Hao SAN


A 2nd-Order ΔΣAD Modulator Using Dynamic Analog Components with Simplified Operation Phase
Chunhui PAN Hao SAN 
Publication:   
Publication Date: 2018/02/01
Vol. E101-A  No. 2  pp. 425-433
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
ΔΣ modulatorring amplifierswitched-capacitor circuitsuccessive-approximation-register ADC (SAR ADC)
 Summary | Full Text:PDF(1.5MB)

A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components
Hao SAN Rompei SUGAWARA Masao HOTTA Tatsuji MATSUURA Kazuyuki AIHARA 
Publication:   
Publication Date: 2017/02/01
Vol. E100-A  No. 2  pp. 534-540
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
cyclic ADCnon-binary ADCradix-value estimation algorithmβ-expansionmultiply-by-β MDAC.
 Summary | Full Text:PDF(3.7MB)

Experimental Implementation of Non-binary Cyclic ADCs with Radix Value Estimation Algorithm
Rompei SUGAWARA Hao SAN Kazuyuki AIHARA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 308-315
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
Non-binary ADCCyclic ADCRadix value estimation algorithmβ expansionMultiply-by-β MDAC
 Summary | Full Text:PDF(2.6MB)

Robust Cyclic ADC Architecture Based on β-Expansion
Rie SUZUKI Tsubasa MARUYAMA Hao SAN Kazuyuki AIHARA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 553-559
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
robust ADCβ-expansionredundancycyclic ADCradix-value estimation algorithm
 Summary | Full Text:PDF(1.8MB)

Non-binary Pipeline Analog-to-Digital Converter Based on β-Expansion
Hao SAN Tomonari KATO Tsubasa MARUYAMA Kazuyuki AIHARA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/02/01
Vol. E96-A  No. 2  pp. 415-421
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
non-binary AD conversionβ-expansionpipeline ADCswitched-capacitor circuitsmultiply-by-β MDAC
 Summary | Full Text:PDF(1.4MB)

Noise-Coupled Image Rejection Architecture of Complex Bandpass ΔΣAD Modulator
Hao SAN Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2  pp. 390-394
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
complex bandpass ΔΣAD modulatornoise-coupled architectureimage rejection
 Summary | Full Text:PDF(366.7KB)

SAR ADC Algorithm with Redundancy and Digital Error Correction
Tomohiko OGAWA Haruo KOBAYASHI Yosuke TAKAHASHI Nobukazu TAKAI Masao HOTTA Hao SAN Tatsuji MATSUURA Akira ABE Katsuyoshi YAGI Toshihiko MORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2  pp. 415-423
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
SAR ADCdigital error correctionnon-binaryredundancy
 Summary | Full Text:PDF(632.9KB)

Cross-Noise-Coupled Architecture of Complex Bandpass ΔΣAD Modulator
Hao SAN Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4  pp. 998-1003
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
complex bandpass ΔΣAD modulatornoise couplingfeedforwardmultibit
 Summary | Full Text:PDF(375.7KB)

Novel Architecture of Feedforward Second-Order Multibit ΔΣAD Modulator
Hao SAN Hajime KONAGAYA Feng XU Atsushi MOTOZAWA Haruo KOBAYASHI Kazumasa ANDO Hiroshi YOSHIDA Chieto MURAYAMA Kanichi MIYAZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 965-970
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
ΔΣAD modulatorswitched-capacitorfeedforwardmultibit
 Summary | Full Text:PDF(633KB)

A Second-Order Multibit Complex Bandpass ΔΣAD Modulator with I, Q Dynamic Matching and DWA Algorithm
Hao SAN Yoshitaka JINGU Hiroki WADA Hiroyuki HAGIWARA Akira HAYAKAWA Haruo KOBAYASHI Tatsuji MATSUURA Kouichi YAHAGI Junya KUDOH Hideo NAKANE Masao HOTTA Toshiro TSUKADA Koichiro MASHIKO Atsushi WADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1181-1188
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
complex bandpass ΔΣAD modulatorIQ path mismatchesdynamic matchingmiltibitdata-weighted averaging
 Summary | Full Text:PDF(1.1MB)

Complex Bandpass ΔΣAD Modulator Architecture without I, Q-Path Crossing Layout
Hao SAN Akira HAYAKAWA Yoshitaka JINGU Hiroki WADA Hiroyuki HAGIWARA Kazuyuki KOBAYASHI Haruo KOBAYASHI Tatsuji MATSUURA Kouichi YAHAGI Junya KUDOH Hideo NAKANE Masao HOTTA Toshiro TSUKADA Koichiro MASHIKO Atsushi WADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4  pp. 908-915
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
complex bandpass ΔΣAD modulatorIQ path mismatchesdynamic matchingmultiplexer
 Summary | Full Text:PDF(820.3KB)

Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths
Jun OTSUKI Hao SAN Haruo KOBAYASHI Takanori KOMURO Yoshihisa YAMADA Aiyan LIU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C  No. 6  pp. 1290-1294
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: AD/DA
Keyword: 
Cartesian transmitterarbitrary waveform generatorIQ mismatchSFDRspread spectrum
 Summary | Full Text:PDF(600.7KB)

A Noise-Shaping Algorithm of Multi-bit DAC Nonlinearities in Complex Bandpass ΔΣAD Modulators
Hao SAN Haruo KOBAYASHI Shinya KAWAKAMI Nobuyuki KUROIWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/04/01
Vol. E87-A  No. 4  pp. 792-800
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
complex bandpass ΔΣAD modulatorbandpass filternoise-shapingADCDACelement rotationdata-weighted averaginglow-IF receiver
 Summary | Full Text:PDF(995.5KB)