Gang HE


Hybrid Message-Passing Algorithm and Architecture for Decoding Cyclic Non-binary LDPC Codes
Yichao LU Gang HE Guifen TIAN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2652-2659
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
Belief propagation algorithmiterative majority-logic decodinglow-density parity-check codesnon-binaryVLSI
 Summary | Full Text:PDF(1.6MB)

A 530 Mpixels/s Intra Prediction Architecture for Ultra High Definition H.264/AVC Encoder
Gang HE Dajiang ZHOU Jinjia ZHOU Tianruo ZHANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 419-427
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264/AVCintra predictiondata dependencyhardware architecture
 Summary | Full Text:PDF(2.1MB)

Cache Based Motion Compensation Architecture for Quad-HD H.264/AVC Video Decoder
Jinjia ZHOU Dajiang ZHOU Gang HE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 439-447
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264/AVCmotion compensation2-D cacheinterpolationQuad-HDultra high definition
 Summary | Full Text:PDF(1.1MB)