Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/03/01 Vol. E92-CNo. 3pp. 356-363 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: power management,
low voltage scalability,
SoC memory platform,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/10/01 Vol. E90-CNo. 10pp. 1927-1935 Type of Manuscript: Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market) Category: Next-Generation Memory for SoC Keyword: DFM RAM,
2 cell/bit,
low voltage scalability,
screening test,
SoC memory platform,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/04/01 Vol. E90-CNo. 4pp. 765-771 Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies) Category: Memory Keyword: SOI,
capacitorless,
DRAM,
low power,
data retention,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-CNo. 11pp. 1519-1525 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: PVT variation,
temperature detection,
series regulator,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-CNo. 11pp. 1612-1619 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: soft error,
ECC,
TCAM,
embedded,
DRAM,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/10/01 Vol. E88-CNo. 10pp. 2020-2027 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: embedded memory,
DRAM,
voltage margin,
low voltage,
system on chip,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12pp. 2991-3000 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Power Optimization Keyword: embedded memory,
DRAM,
low power,
system on chip,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/04/01 Vol. E86-CNo. 4pp. 624-634 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies) Category: Design Methods and Implementation Keyword: embedded DRAM,
various DRAM macros,
low voltage operation,
short TAT,
BIST,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/02/01 Vol. E84-CNo. 2pp. 253-259 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: SOI,
floating body,
body control,
high speed,
low power,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/03/20 Vol. E82-CNo. 3pp. 544-552 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology) Category: Silicon Devices Keyword: SOI-DRAM,
floating body,
high speed,
low power,
data retention characteristics,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/07/20 Vol. E80-CNo. 7pp. 899-904 Type of Manuscript: Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs) Category: Novel Structure Devices Keyword: memory,
SOI-DRAM,
body region,
refresh,
data retention,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/07/20 Vol. E79-CNo. 7pp. 997-1002 Type of Manuscript: Special Section PAPER (Special Issue on the 1995 Symposium on VLSI Circuits (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.31, No.4 April 1996)) Category: Memory Keyword:
