Daisuke SUZUKI

Design of a Lookup Table Circuit Based on TMR Logic and Its Application to an Immediate Wake-Upable FPGA
Daisuke SUZUKI  Masanori NATSUI  Takahiro HANYU 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2009/07/01
Vol. J92-C  No. 7  pp. 233-240
Type of Manuscript: PAPER
Category: 
Keyword: 
FPGA,  lookup table,  leakage current,  TMR device,  DyCML, 
  Summary |  Full Text(in Japanese):PDF (690.6KB)