Chung-Hsien WU


VLSI Architecture and Implementation for Speech Recognizer Based on Discriminative Bayesian Neural Network
Jhing-Fa WANG Jia-Ching WANG An-Nan SUEN Chung-Hsien WU Fan-Min LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/08/01
Vol. E85-A  No. 8  pp. 1861-1869
Type of Manuscript:  Special Section PAPER (Special Section on Digital Signal Processing)
Category: Implementations of Signal Processing Systems
Keyword: 
discriminative Bayesian neural networkspeech recognitionVLSI
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