Ching-Yuan YANG


A 3.2-GHz Down-Spread Spectrum Clock Generator Using a Nested Fractional Topology
Ching-Yuan YANG Chih-Hsiang CHANG Wen-Ger WONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/02/01
Vol. E91-A  No. 2  pp. 497-503
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
spread spectrum clock generationfractional phase-locked loopdelay-locked loopphase compensationfractional divider
 Summary | Full Text:PDF(794KB)

Injection-Locked Clock Recovery Using a Multiplexed Oscillator for Half-Rate Data-Recovered Applications
Ching-Yuan YANG Ken-Hao CHANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1  pp. 409-412
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
clock recoverydata recoveryinjection-locked oscillation
 Summary | Full Text:PDF(574.9KB)

A 1.25-Gb/s Burst-Mode Half-Rate Clock and Data Recovery Circuit Using Realigned Oscillation
Ching-Yuan YANG Jung-Mao LIN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/01/01
Vol. E90-C  No. 1  pp. 196-200
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
burst-mode CDRclock recoveryphase-locked looprealigned oscillation
 Summary | Full Text:PDF(674.9KB)

High-Frequency Low-Noise Voltage-Controlled LC-Tank Oscillators Using a Tunable Inductor Technique
Ching-Yuan YANG Meng-Ting TSAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1567-1574
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
LC VCOtunable inductorhigh Qtransformer
 Summary | Full Text:PDF(1.2MB)

A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector
Ching-Yuan YANG Yu LEE Cheng-Hsing LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6  pp. 746-752
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
phase-locked loopphase synchronizationclock and data recoveryphase detector
 Summary | Full Text:PDF(905.2KB)