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Chien-Nan Jimmy LIU

Measurement and Evaluation of the Bioelectrical Impedance of the Human Body by Deconvolution of a Square Wave Yuhwai TSENG Chauchin SU Chien-Nan Jimmy LIU
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/06/01 Vol. E93-D No. 6 pp. 1656-1660 Type of Manuscript: LETTER Category: Biological Engineering Keyword: body impedance, square test waveform, deconvolution,
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Measuring the Transmission Characteristic of the Human Body in an Electrostatic-Coupling Intra Body Communication System Using a Square Test Stimulus Yuhwai TSENG Chauchin SU Chien-Nan Jimmy LIU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/03/01 Vol. E93-A No. 3 pp. 664-668 Type of Manuscript: LETTER Category: Measurement Technology Keyword: square waveform, deconvolution, intra-body communication,
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Dynamic Supply Current Waveform Estimation with Standard Library Information Mu-Shun Matt LEE Chien-Nan Jimmy LIU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/03/01 Vol. E93-A No. 3 pp. 595-606 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: dynamic supply current, gate-level, standard library,
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Analysis and Design of Wide-Band Digital Transmission in an Electrostatic-Coupling Intra-Body Communication System Yuhwai TSENG Chauchin SU Chien-Nan Jimmy LIU
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2009/11/01 Vol. E92-B No. 11 pp. 3557-3563 Type of Manuscript: LETTER Category: Electromagnetic Compatibility(EMC) Keyword: Intra-Body communication, body network, wideband transmission,
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A Low Jitter Self-Calibration PLL for 10-Gbps SoC Transmission Links Application Kuo-Hsing CHENG Yu-Chang TSAI Chien-Nan Jimmy LIU Kai-Wei HONG Chin-Cheng KUO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/07/01 Vol. E92-C No. 7 pp. 964-972 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: phase-locked loop (PLL), self-calibration, low jitter, multi-phase VCO,
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An Efficient Approach with Scaling Capability to Improve Existing Memory Power Model Wen-Tsan HSIEH Chi-Chia YU Chien-Nan Jimmy LIU Yi-Fang CHIU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/05/01 Vol. E90-A No. 5 pp. 1038-1044 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: memory power model, scalable model, lib format,
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Passive Reduced-Order Macro-Modeling for Linear Time-Delay Interconnect Systems Wenliang TSENG Chien-Nan Jimmy LIU Chauchin SU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-C No. 11 pp. 1713-1718 Type of Manuscript: LETTER Category: Microwaves, Millimeter-Waves Keyword: model-order reduction, passive macromodels, state-space time-delays systems, transmission lines,
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An Efficient Approach to Build Accurate Behavioral Models of PLL Designs Chin-Cheng KUO Yu-Chien WANG Chien-Nan Jimmy LIU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/02/01 Vol. E89-A No. 2 pp. 391-398 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog behavioral model, PLL, IP, bottom-up extraction,
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Efficient Vector Compaction Methods for Power Estimation with Consecutive Sampling Techniques Chih-Yang HSU Chien-Nan Jimmy LIU Jing-Yang JOU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/11/01 Vol. E87-A No. 11 pp. 2973-2982 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: power estimation, vector compaction, grouping, consecutive sampling, random sampling,
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An Efficient Power Model for IP-Level Complex Designs Chih-Yang HSU Chien-Nan Jimmy LIU Jing-Yang JOU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/08/01 Vol. E86-A No. 8 pp. 2073-2080 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: IP-level, power model, lookup table, dynamic grouping,
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