Chia-Yi LIN


On Reducing Test Power, Volume and Routing Cost by Chain Reordering and Test Compression Techniques
Chia-Yi LIN Li-Chung HSU Hung-Ming CHEN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 369-378
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
DFTTSPtest power
 Summary | Full Text:PDF(751.6KB)