Chaochao FENG

Architecture and Implementation of a Reduced EPIC Processor
Jun GAO  Minxuan ZHANG  Zuocheng XING  Chaochao FENG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/01/01
Vol. E96-D  No. 1  pp. 9-18
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
ILP,  EPIC,  IA-64,  processor architecture,  hardware implementation, 
  Summary |  Full Text:PDF (1.8MB)
A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip
Chaochao FENG  Zhonghai LU  Axel JANTSCH  Minxuan ZHANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/05/01
Vol. E95-D  No. 5  pp. 1519-1522
Type of Manuscript: LETTER
Category: Computer System
Keyword: 
3D NoC,  bufferless router,  permutation network, 
  Summary |  Full Text:PDF (370.1KB)
Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip
Chaochao FENG  Zhonghai LU  Axel JANTSCH  Minxuan ZHANG  Xianju YANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/04/01
Vol. E95-D  No. 4  pp. 1052-1061
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
bufferless network-on-chip,  deflection routing,  multicast,  fault-tolerance, 
  Summary |  Full Text:PDF (1.8MB)