Atsushi ISHII


A 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and Differentially Fed through a Hole in a Silicon Chip
Naoya OIKAWA Jiro HIROKAWA Hiroshi NAKANO Yasutake HIRACHI Hiroshi ISONO Atsushi ISHII Makoto ANDO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2016/01/01
Vol. E99-B  No. 1  pp. 27-32
Type of Manuscript:  Special Section PAPER (Special Section on Recent Progress in Antennas, Propagation and Wireless Systems Related to Topics in ISAP2014)
Category: Antennas and Propagation
Keyword: 
differential-feed antennapatch antennaon-chip antennaradiation efficiencyreverberation chamber
 Summary | Full Text:PDF(2.3MB)

Manufacture and Performance of a 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and the Feed through a Hole in a Silicon Chip
Jun ASANO Jiro HIROKAWA Hiroshi NAKANO Yasutake HIRACHI Hiroshi ISONO Atsushi ISHII Makoto ANDO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2013/12/01
Vol. E96-B  No. 12  pp. 3108-3115
Type of Manuscript:  PAPER
Category: Antennas and Propagation
Keyword: 
on-chip antennaconnecting lossradiation efficiencyreverberation chamber
 Summary | Full Text:PDF(2.5MB)

Look Up Table Compaction Based on Folding of Logic Functions
Shinji KIMURA Atsushi ISHII Takashi HORIYAMA Masaki NAKANISHI Hirotsugu KAJIHARA Katsumasa WATANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12  pp. 2701-2707
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
field programmable gate array (FPGA)LUT architecturereconfigurable logic
 Summary | Full Text:PDF(329.8KB)