Akihiko YASUOKA


Circuit Technology for Giga-bit/Low Voltage Operating SOI-DRAM
Akihiko YASUOKA Kazutami ARIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 436-442
Type of Manuscript:  INVITED PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: Circuit Technologies and Applications
Keyword: 
low voltage operationSOI-DRAMbody controllong data retention timehigh speed
 Summary | Full Text:PDF(600.7KB)

Analysis of the Delay Distributions of 0.5 µm SOI LSIs
Toshiaki IWAMATSU Takashi IPPOSHI Yasuo YAMAGUCHI Kimio UEDA Koichiro MASHIKO Shigeto MAEGAWA Yasuo INOUE Tadashi HIRAO Tdashi NISHIMURA Akihiko YASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 464-471
Type of Manuscript:  Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: 
Keyword: 
SOISIMOXdivideradderhigh-speedlow voltage
 Summary | Full Text:PDF(735.3KB)

111-MHz 1-Mbit CMOS Synchronous Burst SRAM Using a Clock Activation Control Method
Hirotoshi SATO Shigeki OHBAYASHI Yasuyuki OKAMOTO Setsu KONDOH Tomohisa WADA Ryuuichi MATSUO Michihiro YAMADA Akihiko YASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 735-742
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Static RAMs
Keyword: 
memorysynchronous SRAMhigh speed SRAM, low powerclock
 Summary | Full Text:PDF(823.7KB)

A 4-Mb SRAM Using a New Hierarchical Bit Line Organization Utilizing a T-Shaped Bit Line for a Small Sized Die
Yoshiyuki HARAGUCHI Toshihiko HIROSE Motomu UKITA Tomohisa WADA Masanao EINO Minoru SAITO Michihiro YAMADA Akihiko YASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 743-749
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Static RAMs
Keyword: 
integrated electronicshigh density SRAMhierarchical bit line organizationT-shaged bit line
 Summary | Full Text:PDF(796.2KB)