Akashi SATOH


A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation
Daisuke FUJIMOTO Toshihiro KATASHITA Akihiko SASAKI Yohei HORI Akashi SATOH Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2533-2541
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
power supply currentelectromagnetic leakageinformation leakageAES
 Summary | Full Text:PDF(2.9MB)

Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption
Yohei HORI Toshihiro KATASHITA Hirofumi SAKANE Kenji TODA Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/11/01
Vol. E96-D  No. 11  pp. 2333-2343
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
dynamic partial reconfiguration (DPR)field-programmable gate array (FPGA)Advanced Encryption Standard (AES)Galois/Counter Mode (GCM)authenticated encryption
 Summary | Full Text:PDF(1.1MB)

Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current
Yu-ichi HAYASHI Naofumi HOMMA Takaaki MIZUKI Takeshi SUGAWARA Yoshiki KAYANO Takafumi AOKI Shigeki MINEGISHI Akashi SATOH Hideaki SONE Hiroshi INOUE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 1089-1097
Type of Manuscript:  PAPER
Category: Electronic Components
Keyword: 
information securityelectromagnetic information leakagecryptographic modulesside-channel attackscommon-mode currents
 Summary | Full Text:PDF(2.3MB)

A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments
Sho ENDO Takeshi SUGAWARA Naofumi HOMMA Takafumi AOKI Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/01/01
Vol. E95-A  No. 1  pp. 263-266
Type of Manuscript:  Special Section LETTER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
faulty injection attacksclock glitchRSAsafe-error attack
 Summary | Full Text:PDF(1.6MB)

High-Performance Architecture for Concurrent Error Detection for AES Processors
Takeshi SUGAWARA Naofumi HOMMA Takafumi AOKI Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/10/01
Vol. E94-A  No. 10  pp. 1971-1980
Type of Manuscript:  PAPER
Category: Cryptography and Information Security
Keyword: 
dependable architecturesfault injection attackstamper resistanceerror detection
 Summary | Full Text:PDF(2.9MB)

A Design Methodology for a DPA-Resistant Circuit with RSL Techniques
Daisuke SUZUKI Minoru SAEKI Koichi SHIMIZU Akashi SATOH Tsutomu MATSUMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2497-2508
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
side-channel attacksdifferential power analysishardware countermeasurerandom switching logicCMOS logic circuit
 Summary | Full Text:PDF(2.2MB)

A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks
Naofumi HOMMA Sei NAGASHIMA Takeshi SUGAWARA Takafumi AOKI Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1  pp. 193-202
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
Keyword: 
side-channel attacksDPADEMAcryptographic modulewaveform matchingphase-only correlation
 Summary | Full Text:PDF(1.2MB)